Register for #AskOski Live - A Decoding Formal Club online event

When: Thursday, September 24, 2020, 10:00am – 11:00am PDT

Sponsored by:  

Cadence Designs Systems

You’re invited to a live discussion session with Oski’s founder, Vigyan Singhal, where he will answer your questions live!

Sampling of questions asked and answered in the last session:

• What size of design should we target for formal sign-off?
• What are the criteria for formal sign-off?
• How do symbolic constants help to reduce complexity?
• Is it safe to merge coverage from simulation and formal?

Speaker bio: Vigyan Singhal is the founder and chairman of Oski Technology. He has worked in the semiconductor and EDA industries for more than 25 years. Previously he founded Jasper Design Automation, later acquired by Cadence. Vigyan has been applying formal verification on industrial designs since verifying simulation-resistant pieces of the PowerPC 601 at Motorola, post-silicon, in 1993. Later, Vigyan was at Cadence, where he built their first-general formal verification tool. He has authored more than 70 publications and holds 14 patents in IC design and verification. Vigyan has a PhD in EECS from the University of California at Berkeley and a BTech in Computer Science from IIT Kanpur where he graduated at the top of his class.

What is #AskOski?

#AskOski is an initiative undertaken by Oski Technology to create an interactive dialogue with the verification community and answer your questions regarding formal verification. Submit your questions here.